Hardware-Aware Compilers

SMART compilers aim to move beyond today’s compilation strategies and support a diverse cross-stack ecosystem of error management protocols relevant to current and next generation quantum computing systems.

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Noise-Aware and Error-Resilient Compilation

Currently, either compilers provide limited control over target hardware compilation, or they are developed within a siloed stack, such that they are not easily applicable when front-end or back-ends are changed. The SMART team seeks to address this issue by creating SMART compilers that are hardware-aware and can be optimized for control and qubit resource overheads.

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Scalable Quantum Optimal Control

In digital quantum computing, physical layer error management is in part supplied by the optimization and calibration of pulse waveforms that define gate operations. Standard approaches to optimization are typically rather naive and do not rely on characterizations of the underlying noise environment. SMART strives to bridge this gap by enabling characterization-informed scalable quantum control strategies that draw on classical resources to realize real-time updates.